(1) Field of the Invention
The present invention relates to a method used to fabricate integrated circuits, on a semiconductor substrate, and more specifically to a method used to fabricate conductive wiring structures, embedded by low dielectric constant materials.
(2) Description of the Prior Art
To increase the performance of integrated circuits, fabricated on semiconductor substrates, in terms of metal conductivity, and insulator capacitance, copper is now being used to replace the higher resistivity aluminum, or tungsten, counterparts, for wiring applications, while low dielectric constant, (low K), materials, such as fluorine-doped silicon oxide glass, (FSG), hydrogen silsesquioxane, (HSQ), or aromatic hydrocarbons, with dielectric constants of about 2.5 to 3.5, are being used to replace chemically vapor deposited silicon oxide layer, which has a dielectric constant of about 4.0 to 4.5. The use of low K materials however, can present adhesion problems, when overlaid with higher dielectric constant materials, used as a hard mask for damascene type patterning procedures. For example a composite layer, damascene pattern, comprised of an overlying hard mask material, such as CVD silicon oxide, and an underlying low K material, such as FSG, is formed using conventional photolithographic and dry etching procedures. However the removal of the photoresist or polymer shape, used to define the damascene pattern, in the composite layer, can result in a loss of adhesion between the overlying hard mask, silicon oxide layer, and the underlying FSG layer, specifically during a wet stripping, or a wet clean up step, used after the photoresist stripping procedure. The loss of adhesion between these layers of the composite damascene mask can result in an inadequate, subsequent metal fill, exhibiting bridging to adjacent metal shapes, and leading to unwanted leakage and yield loss.
This invention will offer solutions for the loss of adhesion, between a silicon oxide hard mask, and an underlying low K material, that can occur during polymer, or photoresist removal procedures. Specific treatments, described in this invention, applied to a low K material, used as the underlying layer of a composite layer, damascene mask, or used as an interlevel dielectric layer, prior to the deposition of the hard mask material, results in an improvement of the adhesion between the overlying hard mask, and the underlying low K material. This invention will offer treatments featuring an NH.sub.4 OH treatment, or a UV curing procedure, applied to an exposed low K material. Prior art, such as Joshi, in U.S. Pat. No. 4,732,801, describes a procedure to improve the adhesion of refractory metals, or silicon oxide layers, to underlying materials, but that prior art does not use the treatments described in this invention, nor does it describe the conditions needed for improving the adhesion of hard mask insulator layers, to underlying low K materials.